Title :
Modular multiplier by folding Barrett modular reduction
Author :
Tao Wu ; Shu-Guo Li ; Li-Lian Liu
Author_Institution :
Dept. of Microelectron. & Nanoelectron., Tsinghua Univ., Beijing, China
fDate :
Oct. 29 2012-Nov. 1 2012
Abstract :
Modular multipliers of medium or small sizes can be implemented by Barrett modular reduction algorithm. In this work, based on the folded Barrett modular reduction algorithm, we propose a two-stage pipelined modular multiplier for residue arithmetic. In terms of Time×Area, the proposed architecture is more efficient than the modular multiplier by present Barrett modular reduction algorithm.
Keywords :
multiplying circuits; public key cryptography; residue number systems; folded Barrett modular reduction algorithm; pipelined modular multiplier; residue arithmetic; Computational complexity; Computer science; Cryptography; Educational institutions; Hardware; Signal processing algorithms; Software algorithms;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-4673-2474-8
DOI :
10.1109/ICSICT.2012.6467863