Total ionizing dose effects on triple-gate FETs

Author

Shi-Yao Liu ; Wei He ; Jian-Min Cao ; Si-Wen Huang ; Xiao-Jin Zhao

Author_Institution

Dept. of Electron. Sci. & Technol., Shenzhen Univ., Shenzhen, China

fYear

2012

fDate

Oct. 29 2012-Nov. 1 2012

Firstpage

1

Lastpage

3

Abstract

By radiating different amount of radiation to the pseudo-MOS transistor, the corresponding I-V characterristic curve can be obtained. Additionally, the density of interface traps and the density of trapped-oxide charges which origin from the buried oxide layer of the SOI material while under radiating can be obtained using the middle band voltage analyze method. The analysis of the accumulation of the trap current in the buried oxide layer and the effect of it can be done using these parameters together with the Altal 3D device simulation software.

Keywords

MOSFET; radiation hardening (electronics); silicon-on-insulator; 3D device simulation software; I-V characteristic curve; SOI material; buried oxide layer; middle band voltage analyze method; pseudo-MOS transistor; total ionizing dose effects; trap current accumulation; trapped-oxide charges; triple-gate FET; Equations; Logic gates; Mathematical model; Silicon; Silicon on insulator technology; Threshold voltage; Transistors; silicon-on-insulator (SOI) total Ionizing Dose Effects(TID) Pseudo-MOS;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4673-2474-8

Type

conf

DOI

10.1109/ICSICT.2012.6467931

Filename

6467931