Title :
An output-capacitor-free buck converter with nano-second-DVS and sub-switching-cycle load transient response
Author :
Yi Zhang ; Dongsheng Ma
Author_Institution :
Integrated Syst. Design Lab., Univ. of Texas at Dallas, Richardson, TX, USA
fDate :
Oct. 29 2012-Nov. 1 2012
Abstract :
An output-capacitor-free switching buck converter is proposed in this paper. By removing the off-chip capacitor, both the PCB footprint and system volume can be reduced. Due to the smaller output capacitance and added pull-up/down power transistors, the dynamic voltage scaling (DVS) tracking speed can be improved to nano-seconds/volt level. The load transient response of the proposed switching converter is also improved within one switching cycle. The proposed buck converter is designed with TSMC 0.35-μm CMOS process, regulating a 1.2~1.8V output voltage from a 3-V input power supply at 2-MHz switching frequency. A 63-ns/V DVS tracking speed is achieved with 100-pF filtering capacitor. The output voltage is recovered within one switching cycle when a 270mW load change occurs.
Keywords :
CMOS integrated circuits; power transistors; printed circuits; switching convertors; transient response; PCB footprint; TSMC CMOS process; capacitance 100 pF; dynamic voltage scaling tracking; filtering capacitor; frequency 2 MHz; nanosecond-DVS tracking; off-chip capacitor; output-capacitor-free switching buck converter; power 270 mW; pull-up-down power transistors; size 0.35 mum; subswitching-cycle load transient response; voltage 3 V; Capacitors; Power transistors; Steady-state; Switches; Switching frequency; Transient response; Voltage control;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-4673-2474-8
DOI :
10.1109/ICSICT.2012.6467933
