Title :
Improved reliability of rarely switching CMOS circuits in ULSI devices
Author :
Sofer, S. ; Livshits, P. ; Priel, M.
Author_Institution :
Freescale Semicond. Israel Ltd., Herzlia, Israel
Abstract :
In this work, novel configurations of rarely switching ULSI I/O circuits, which provide a "refresh" operation allowing for temporal bias removal without any changes in the logic state or electrical characteristics of these circuits, are presented. This bias removal significantly reduces the aging of the circuits and allows for the lessening of design timing margins, thus reducing the overall design costs.
Keywords :
CMOS integrated circuits; ULSI; ageing; integrated circuit design; integrated circuit reliability; ULSI devices; circuit aging; switching CMOS circuits; switching ULSI I/O circuits; temporal bias removal; timing margin design; Integrated circuit reliability; MOSFETs; Stress; Switching circuits; Timing; Ultra large scale integration;
Conference_Titel :
Integrated Reliability Workshop Final Report (IRW), 2012 IEEE International
Conference_Location :
South Lake Tahoe, CA
Print_ISBN :
978-1-4673-2749-7
DOI :
10.1109/IIRW.2012.6468950
