• DocumentCode
    599554
  • Title

    A high-resolution DCO with MOS capacitors

  • Author

    Zixuan Wang ; Cheng Huang ; Jianhui Wu

  • Author_Institution
    National ASIC system engineering research centre, Southeast University, Nanjing, 210096 China
  • fYear
    2012
  • fDate
    16-20 Dec. 2012
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A digitally controlled oscillator (DCO) that achieves a minimum frequency tuning step of 20 kHz without any dithering is presented. Three tuning stages are employed to obtain a wide frequency range of 1 GHz in the classical LC tank. The fine tuning bank is realized by inverse connection of two pairs of pMOS transistors and a tiny unit capacitance of 0.47 fF is achieved. A prototype integrated in 130nm CMOS technology exhibits a phase noise of −118.7 dBc/Hz @1MHz offset and a power dissipation of 2 mW under a supply of 1.2 V. The core area size is 330um×480um.
  • Keywords
    ADPLL; DCO; hign resolution; phase noise;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics (ICM), 2012 24th International Conference on
  • Conference_Location
    Algiers, Algeria
  • Print_ISBN
    978-1-4673-5289-5
  • Type

    conf

  • DOI
    10.1109/ICM.2012.6471418
  • Filename
    6471418