A 0.9 V high gain and high linear bleeding CMOS mixer for wireless applications

In this paper, a double balanced bleeding CMOS mixer topology, appropriate for low voltage applications, is presented. A low voltage mixer is designed with high gain and good linearity. The bleeding technique and derivative technique are used to make this trade off. The mixer is designed in 0.18 µm CMOS technology and simulated with Spectre RF at 2 GHz input frequency which can work with supplies as low as 0.9 V. The simulation results show the conversion gain of 18 dB, an input referred third order (IIP3) of 9 dBm, input-referred second-order intercept point (IIP2) of +64 dBm, DSB noise figure of 11 dB and 7 mW power dissipation.