DocumentCode :
59969
Title :
Trans-Capacitance Modeling in Junctionless Symmetric Double-Gate MOSFETs
Author :
Jazaeri, Farzan ; Barbut, Lucian ; Sallese, Jean-Michel
Author_Institution :
EPFL, Lausanne, Switzerland
Volume :
60
Issue :
12
fYear :
2013
fDate :
Dec. 2013
Firstpage :
4034
Lastpage :
4040
Abstract :
We have developed a closed-form solution for trans-capacitances in long-channel junctionless double-gate (JL DG) MOSFET. This approach, which is derived from a coherent charge-based model, was fully validated with technology computer-aided design simulations. According to this paper, a complete intrinsic capacitance network is obtained, which represents an essential step toward ac analysis of circuits based on junctionless devices.
Keywords :
MOSFET; semiconductor device models; technology CAD (electronics); JL DG MOSFET; ac analysis; capacitance network; closed-form solution; coherent charge-based model; junctionless devices; junctionless symmetric double-gate MOSFET; long-channel junctionless double-gate MOSFET; technology computer-aided design simulations; transcapacitances modeling; Analytical models; Capacitance; Electric potential; Logic gates; MOSFET; Mobile communication; Semiconductor device modeling; ac analysis; capacitance; compact model; double-gate MOSFET; junctionless; nanowire;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2013.2285013
Filename :
6642051
Link To Document :
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