CMOS analog front end for ECG measurement system

In this paper, we present an analog front end for human electrocardiogram (ECG) measurement system. This analog front end contains an instrumentation amplifier (IA), off-chip passive filters, and a successive approximation register analog-to-digital converter (SAR-ADC). During the measurement, ECG signals are enhanced by the IA, and then quantized by SAR-ADC. A PC client collects the digital data and turns it into waveform shown on the monitor. Both the IA and SAR-ADC were fabricated in TSMC 0.18 μm 1P6M CMOS process. This system is dissipating 1.32 mW from 1.2 V supply. The IA delivers a gain of 40 dB with a bandwidth of 69 kHz. The SAR-ADC achieves an ENOB of 9.13 at a sampling rate of 50 kS/s.