Behavioral modeling of continuous-time ΣΔ modulators in matlab/simulink

Author

Aguirre, P. ; Camargo, V. ; Klimach, Hamilton ; Susin, A. ; Prior, C.

Author_Institution

Dept. of Electr. Eng., Fed. Univ. of Rio Grande do Sul, Porto Alegre, Brazil

fYear

2013

fDate

Feb. 27 2013-March 1 2013

Firstpage

1

Lastpage

4

Abstract

In this paper, a behavioral model of Continuous-Time (CT) Sigma-Delta Modulators (ΣΔMs) is presented. The non-idealities of the ΣΔM such as operational amplifiers finite parameters (DC gain, slew-rate, voltage saturation and unity gain frequency), excess loop delay, clock jitter and quantizer offset are modeled in Matlab/Simulink environment providing accurate time-based simulations. For demonstration purposes, a 3rd order single bit CT ΣΔM topology with Non-Return to Zero (NRZ) and another one with Switched-Capacitor Resistor (SCR) DAC feedback are simulated and have their performance degradation due to non-idealities analyzed. The effects of the non-idealities are clearly seen when compared to the ideal modulator. Also, key design specifications for the functional building blocks could be derived from simulations with the proposed models.

Keywords

delta-sigma modulation; mathematics computing; resistors; switched capacitor networks; time-domain analysis; 3rd order single bit CT ΣΔM topology; Matlab-Simulink; NRZ; SCR DAC feedback; continuous-time ΣΔ modulator behavioral modeling; continuous-time sigma-delta modulators behavioral model; functional building blocks; nonreturn to zero; switched-capacitor resistor DAC feedback; time-based simulations; Clocks; Gain; Integrated circuit modeling; Jitter; Modulation; Optical signal processing; Thyristors;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (LASCAS), 2013 IEEE Fourth Latin American Symposium on

Conference_Location

Cusco

Print_ISBN

978-1-4673-4897-3

Type

conf

DOI

10.1109/LASCAS.2013.6518992

Filename

6518992