Title :
A 60 GHz up-conversion mixer using asymmetric layout with −41.1 dBc LO leakage
Author :
Tsukui, Y. ; Okada, Kenichi ; Matsuzawa, Akira
Author_Institution :
Dept. of Phys. Electron., Tokyo Inst. of Technol., Tokyo, Japan
fDate :
Feb. 27 2013-March 1 2013
Abstract :
This paper presents a 60 GHz up-conversion mixer using asymmetric layout method. The asymmetric layout method contributes to decrease capacitor mismatch, so RF-LO isolation and LO leakage can be improved. The up-conversion mixer is fabricated in a 65 nm CMOS process. This up-conversion mixer achieves RF-LO isolation of -37.3 dBc, LO leakage of -41.1 dBc, conversion gain of 4.3 dB, output power of -8.7dBm and saturated output power of -5.2dBm at a power consumption of 5.4mW.
Keywords :
CMOS analogue integrated circuits; capacitors; field effect MIMIC; millimetre wave mixers; millimetre wave oscillators; oscillators; LO leakage; RF-LO isolation; asymmetric layout; asymmetric layout method; capacitor mismatch; frequency 60 GHz; gain 4.3 dB; power 5.4 mW; size 65 nm; up-conversion mixer; CMOS integrated circuits; Gain; Layout; Mixers; Radio frequency; Transceivers; Transmission line measurements;
Conference_Titel :
Circuits and Systems (LASCAS), 2013 IEEE Fourth Latin American Symposium on
Conference_Location :
Cusco
Print_ISBN :
978-1-4673-4897-3
DOI :
10.1109/LASCAS.2013.6518999
