A robust to PVT fully-differential amplifier in 45nm SOI-CMOS technology

Author

Amaya, A. ; Villota, F. ; Espinosa, G.

Author_Institution

INAOE (Inst. Nac. de Astrofis., Opt. y Electron.), Puebla, Mexico

fYear

2013

fDate

Feb. 27 2013-March 1 2013

Firstpage

1

Lastpage

4

Abstract

In this paper the design of a robust to Process, Voltage and Temperature (PVT) variations fully-differential voltage amplifier is presented. The proposed circuit is implemented in a standard digital CMOS technology as 45 nm-1 V Silicon-on-Insulator. The robustness of the circuit is achieved through the use of a novel input stage, which combines two single-ended differential pairs to obtain a fully-differential behaviour. In addition, compound transistors are used in order to increase the output impedance of the devices and hence the gain. As a result, a low-frequency gain of 60 dB is achieved, with a maximum variation of ±4.2 dB for all process corners and temperatures between -40 °C and 120 °C, and supply voltages between 0.9 V and 1.1 V; moreover transient behaviour and PSRR present a robust performance too.

Keywords

CMOS analogue integrated circuits; differential amplifiers; silicon-on-insulator; PSRR; PVT fully-differential amplifier; PVT variations; SOI-CMOS technology; Si; gain 60 dB; low-frequency gain; output impedance; process voltage and temperature variations; size 45 nm; standard digital CMOS technology; temperature 40 degC to 120 degC; voltage 0.9 V to 1.1 V; CMOS technology; Compounds; Gain; Impedance; Robustness; Topology; Transistors; PVT robustness; Voltage amplifier; fully-differential;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (LASCAS), 2013 IEEE Fourth Latin American Symposium on

Conference_Location

Cusco

Print_ISBN

978-1-4673-4897-3

Type

conf

DOI

10.1109/LASCAS.2013.6519005

Filename

6519005