DocumentCode :
601051
Title :
Capacitance measurements of an SOI based CMUT
Author :
Hernandez, Jaime ; Zure, T. ; Chowdhury, Shuvro
Author_Institution :
Electr. & Comput. Eng. Dept., Univ. of Windsor, Windsor, ON, Canada
fYear :
2013
fDate :
Feb. 27 2013-March 1 2013
Firstpage :
1
Lastpage :
4
Abstract :
Capacitance measurement results for an SOI based CMUT are presented. Measurement results show that the variation in capacitance change as a function of both DC bias and AC excitation is considerably higher than analytically calculated values. Investigation shows that this deviation in capacitance from analytically calculated values is due to the combined effects of different dielectric charging phenomena due to a strong electric field, trap charges in the SOI oxide layer, and the charge motion associated with the leakage current through the buried oxide layer and air in the CMUT cavity. It is concluded that the buried oxide (BOX) layers in SOI wafers are not suitable for use as dielectric spacers in electrostatic MEMS devices.
Keywords :
capacitance measurement; electrostatic devices; microsensors; silicon-on-insulator; AC excitation; CMUT cavity; DC bias; SOI based CMUT; SOI oxide layer; SOI wafers; buried oxide layers; capacitance measurements; dielectric charging phenomena; electrostatic MEMS devices; Capacitance; Capacitance measurement; Dielectrics; Electric fields; Gold; Leakage currents; Voltage measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (LASCAS), 2013 IEEE Fourth Latin American Symposium on
Conference_Location :
Cusco
Print_ISBN :
978-1-4673-4897-3
Type :
conf
DOI :
10.1109/LASCAS.2013.6519037
Filename :
6519037
Link To Document :
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