Title :
FinFET basic cells evaluation for regular layouts
Author :
Meinhardt, Cristina ; Reis, R.
Author_Institution :
Inst. de Inf., Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
fDate :
Feb. 27 2013-March 1 2013
Abstract :
This work evaluates the use of finFET to design a set of basic blocks targeting a regular layout. The main advantage of this approach is a reduction on area and power consumption when using a regular matrix. Moreover, when Independent Gate (IG) finFET is employed in the design of the basic blocks, results are significantly improved in power and delay. Furthermore, when using IG - FinFETs up to 20% area reduction is estimated.
Keywords :
MOSFET; FinFET basic cell evaluation; IG finFET; basic block set design; independent gate finFET; power consumption; regular layouts; regular matrix; CMOS integrated circuits; FinFETs; Inverters; Layout; Logic gates; Transmission line matrix methods;
Conference_Titel :
Circuits and Systems (LASCAS), 2013 IEEE Fourth Latin American Symposium on
Conference_Location :
Cusco
Print_ISBN :
978-1-4673-4897-3
DOI :
10.1109/LASCAS.2013.6519063
