• DocumentCode
    601675
  • Title

    Generalized DC-link voltage balancing control method for multilevel inverters

  • Author

    Deng, Yi ; Teo, Koon Hoo ; Harley, Ronald G.

  • Author_Institution
    Mitsubishi Electric Research Laboratories, Inc., 201 Broadway, 8th Floor, Cambridge, MA 02139, USA
  • fYear
    2013
  • fDate
    17-21 March 2013
  • Firstpage
    1219
  • Lastpage
    1225
  • Abstract
    This paper presents a general dc-link voltage balancing control method for multilevel inverters based on a generalized space vector pulse width modulation (SVPWM) scheme, with no requirements for additional auxiliary-power circuits. The SVPWM scheme generates all the available switching states and switching sequences based on two simple mappings, and calculates the duty cycles simply as for a two-level SVPWM, thus independent of the level of the inverter. The optimal switching sequence and optimal duty cycles for dc-link voltage balancing control are provided in the paper. Because all the measured signals are instantaneous values, the dc-link voltage balancing control method in the paper is suitable for any load without any assumption on the output current waveforms. The dc-link voltage balancing control in the paper is effective even when the capacitances of the dc-link capacitors of the multilevel inverter are not strictly equal or the voltage of the dc source of the multilevel inverter is fluctuating. Simulation results for a five-level inverter are given.
  • Keywords
    SVPWM; Voltage balancing; multilevel inverter;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Applied Power Electronics Conference and Exposition (APEC), 2013 Twenty-Eighth Annual IEEE
  • Conference_Location
    Long Beach, CA, USA
  • ISSN
    1048-2334
  • Print_ISBN
    978-1-4673-4354-1
  • Electronic_ISBN
    1048-2334
  • Type

    conf

  • DOI
    10.1109/APEC.2013.6520454
  • Filename
    6520454