Concurrent Error Detection of Binary and Nonbinary OLS Parallel Decoders

This paper presents a concurrent error detection (CED) scheme for orthogonal Latin square (OLS) parallel decoders. Different from a CED scheme found in the technical literature that protects only the syndrome generator, the proposed CED scheme protects the whole OLS decoder for single stuck-at faults. This paper presents the detailed design and analysis of the proposed CED scheme and shows that it is strongly fault secured for single stuck-at faults. Extensive simulation results are also provided; different figures of merit such as area, power dissipation, gate depth, and coverage are assessed. It is shown that the proposed decoder designs for ( n, k) t-bit error correcting OLS codes (k = 16 ...256; t = 2 ...5) have reasonable overhead; for example, the average area overhead of the proposed CED is 35.5 (23.6) % compared with an OLS decoder with no CED (i.e., the previously reported CED scheme). However, the most significant advantage of the proposed scheme is that it achieves 100% fault coverage for the whole CED circuit, thus providing a very efficient and fully fault-tolerant implementation. The proposed CED is applicable to both binary and nonbinary OLS codes; the CED for a nonbinary OLS decoder achieves comparable or better results than a binary OLS decoder. Moreover, simulation shows that the proposed CED scheme is better than double modular redundancy.