DocumentCode
602636
Title
A multiple SIMD, multiple data (MSMD) architecture: Parallel execution of dynamic and static SIMD fragments
Author
Yaohua Wang ; Shuming Chen ; Jianghua Wan ; Jiayuan Meng ; Kai Zhang ; Wei Liu ; Xi Ning
Author_Institution
Sch. of Comput. Sci., Nat. Univ. of Defense Technol., Changsha, China
fYear
2013
fDate
23-27 Feb. 2013
Firstpage
603
Lastpage
614
Abstract
The efficacy of widely used single instruction, multiple data architectures is often limited when handling divergent control flows and short vectors; both circumstances result in SIMD fragments that use only a subset of the available datapaths. This paper proposes a multiple SIMD, multiple data (MSMD) architecture with flexible SIMD datapaths that can be dynamically or statically repartitioned among multiple control flow paths, all executing simultaneously. The benefits are twofold: SIMD fragments resulting from divergent branches can execute in parallel, as can multiple kernels with short vectors. The resulting SIMD architecture can achieve the flexibility similar to a multiple instruction, multiple data architecture. We have both simulated the architecture and implemented a prototype. Our experiments with data-parallel benchmarks show that the architecture leads to 60% performance gains with an area overhead of only 3.06%.
Keywords
benchmark testing; parallel architectures; MSMD architecture; data-parallel benchmarks; divergent control flow handling; dynamic SIMD fragments; flexible SIMD datapaths; multiple SIMD multiple data architecture; multiple instruction multiple data architecture; parallel execution; single instruction multiple data architectures; static SIMD fragments; Arrays; Hardware; Kernel; Multicore processing; Prototypes; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computer Architecture (HPCA2013), 2013 IEEE 19th International Symposium on
Conference_Location
Shenzhen
ISSN
1530-0897
Print_ISBN
978-1-4673-5585-8
Type
conf
DOI
10.1109/HPCA.2013.6522353
Filename
6522353
Link To Document