Title :
A 20 μV/°C digital offset compensation technique for comparators and differential amplifiers
Author :
Wong, Koon Lun Jackie ; Le, Matthew ; Kwang Young Kim
Author_Institution :
Broadcom Corp., Irvine, CA, USA
Abstract :
Digital offset compensation has been widely used for start-up calibration of analog ICs. It can be valuable in the design of an offset control circuit that has a minimal dependence on temperature. This eliminates the need to recalibrate the circuit during normal operation when the temperature may randomly fluctuate. This paper presents a gm-tracking technique used in an offset correction loop that drifts only 20 μV/°C over a temperature range of 0°C to 100°C. Test circuits fabricated in a 40 nm CMOS technology confirm the performance of the proposed technique.
Keywords :
CMOS analogue integrated circuits; calibration; comparators (circuits); compensation; differential amplifiers; CMOS technology; analog IC; comparators; differential amplifiers; digital offset compensation technique; gm-tracking technique; offset control circuit; offset correction loop; size 40 nm; start-up calibration; temperature 0 degC to 100 degC; test circuits;
Conference_Titel :
Solid State Circuits Conference (A-SSCC), 2012 IEEE Asian
Conference_Location :
Kobe
DOI :
10.1109/IPEC.2012.6522625
