Wireless wafer probing for on-chip analog voltage measurement

Author

Dae Young Lee ; Wentzloff, David D. ; Hayes, John P.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA

fYear

2012

fDate

12-14 Nov. 2012

Firstpage

325

Lastpage

328

Abstract

This paper demonstrates a method for wirelessly measuring analog voltage on DUTs. This technique can be used for test structure characterization. The proposed voltage-to-time converter enables analog voltage values to be wirelessly delivered through capacitive coupling. A dualslope architecture is adopted to mitigate the effects of onchip R and C variation, and an UWB pulse generator is used to relay accurate timing to the ATE with low-power consumption. A prototype, fabricated in 0.13 μm CMOS achieves 8-bit resolution with 1 mV measurement steps. The total area of the on-chip wireless voltage measurement circuit is 0.013 mm² excluding wireless pads.

Keywords

CMOS analogue integrated circuits; automatic test equipment; low-power electronics; pulse generators; radiofrequency measurement; ultra wideband technology; voltage measurement; ATE; CMOS; DUT; UWB pulse generator; capacitive coupling; dual-slope architecture; low-power consumption; on-chip C variation; on-chip R variation; on-chip wireless analog voltage measurement; size 0.13 mum; test structure characterization; voltage 1 mV; voltage-to-time converter; wireless wafer probing; word length 8 bit;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Circuits Conference (A-SSCC), 2012 IEEE Asian

Conference_Location

Kobe

Type

conf

DOI

10.1109/IPEC.2012.6522691

Filename

6522691