DocumentCode :
602796
Title :
Formation of circuit patterns on the only modification area using selective electroless deposition
Author :
Baba, Ken-ichi ; Sugimoto, M. ; Watanabe, Manabu ; Yumoto, Takayuki
Author_Institution :
Japan Surface Treatment Inst. Co., Ltd., Yokosuka, Japan
fYear :
2012
fDate :
10-12 Dec. 2012
Firstpage :
1
Lastpage :
4
Abstract :
The printed wiring board is contained in most electronic parts. A lot of the printed wiring boards are manufactured by the subtractive process. However, the subtractive process needs a lot of numbers of production processes. Therefore, we examined new manufacturing process that the method of forming the metal film only to a necessary part of the substrate. We executed the examination that applied selective electroless plating on the substrate. The UV irradiation and the laser irradiation attracted attention as the pretreatment technique to perform the selective plating. In addition, to solve the problem of short out in the circuit, the examination of anisotropy growth up electroless plating was examined. In these results, anisotropic growth by electroless nickel plating was found to depend on nonlinear diffusion of the Pb and Bi inhibitors at the pattern edges, where the geometry of the film growth changed depending on the species. When Pb was employed, plating growth with a trapezoidal geometry occurred which was advantageous to pattern formation. Moreover, when Pb was used in combination with Bi, the anisotropic growth became possible at lower concentrations. Regarding the selective deposition phenomenon, the direct pattern plating process was improved by initial adsorption of thiourea onto the surface by immersing the substrate in a solution that contained the inhibitor instead of initial selective plating.
Keywords :
electroless deposition; electroplating; printed circuit manufacture; radiation effects; UV irradiation; anisotropic growth; circuit patterns; electroless nickel plating; laser irradiation; manufacturing process; printed wiring board; production process; selective electroless deposition; selective electroless plating; subtractive process;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CPMT Symposium Japan, 2012 2nd IEEE
Conference_Location :
Kyoto
Print_ISBN :
978-1-4673-2654-4
Type :
conf
DOI :
10.1109/ICSJ.2012.6523467
Filename :
6523467
Link To Document :
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