• DocumentCode
    602900
  • Title

    Accurate architecture-level thermal analysis methods for MPSoC with consideration for leakage power dependence on temperature

  • Author

    Yan Jiaqi ; Luo Zuying ; Tang Liang

  • Author_Institution
    Beijing Normal Univ., Beijing, China
  • fYear
    2013
  • fDate
    4-6 March 2013
  • Firstpage
    178
  • Lastpage
    183
  • Abstract
    Efficient thermal analysis plays a key role in the temperature-aware floorplan design for MultiProcessor System-on-Chip (MPSoC) and Dynamic Power& Temperature Management (DPTM). This work adopts the bottom-up modeling method to study architecture-level MPSoC thermal analysis. First, it extracts relative thermal resistance between functional modules with HotSpot software. Then, based on these parameters, this work further proposes three analysis methods with different accuracy and algorithm complexity: Block-level Temperature Analysis Method (BloTAM), Core-level Temperature Analysis Method (CorTAM) and Block-Improving Core Temperature Analysis Method (BiCorTAM). Experiments show that BloTAM and BiCorTAM can substantially reduce the time for MPSoC thermal analysis with the high accuracy. Compared with HotSpot, both methods achieve 50+ times speedup in analysis with average temperature error as low as 3%. They are ideal architecture-level thermal analysis method for MPSoCs.
  • Keywords
    integrated circuit layout; integrated circuit modelling; multiprocessing systems; system-on-chip; thermal analysis; thermal resistance; BiCorTAM; BloTAM; DPTM; HotSpot software; MPSoC; architecture-level thermal analysis; block improving core temperature analysis method; block level temperature analysis method; bottom-up modeling; core level temperature analysis method; dynamic power and temperature management; functional modules; leakage power; multiprocessor system-on-chip; relative thermal resistance; temperature-aware floorplan design; Accuracy; Analytical models; Complexity theory; Heating; Multicore processing; Thermal analysis; Thermal resistance; Architecture-level; MPSoC; Modeling; Thermal Analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design (ISQED), 2013 14th International Symposium on
  • Conference_Location
    Santa Clara, CA
  • ISSN
    1948-3287
  • Print_ISBN
    978-1-4673-4951-2
  • Type

    conf

  • DOI
    10.1109/ISQED.2013.6523607
  • Filename
    6523607