Title :
Geostatistics inspired fast layout optimization of nanoscale CMOS phase locked loop
Author :
Okobiah, O. ; Mohanty, S.P. ; Kougianos, E.
Author_Institution :
NanoSystem Design Lab., Univ. of North Texas, Denton, TX, USA
Abstract :
In this paper, we present a geostatistical method for design and optimization of analog and mixed signal circuits design illustrated with the design of phase locked loop (PLL) systems used in Wide Area Network (WAN) and Private Mobile Radio (PMR) applications. The proposed method incorporates the use of a geostatistic based metamodeling technique (Kriging) and optimization algorithm (gravitational search algorithm) and is compared to similar approaches. The results show that the geostatistical methods provide more accurate metamodels and more efficient optimization design techniques. To the best of the authors´ knowledge, this is the first geostatistical method for metamodeling and optimization of PLL designs. The proposed optimization could achieve 79% reduction in PLL power with 4% reduction in locking time without any area penalty.
Keywords :
CMOS integrated circuits; analogue integrated circuits; circuit optimisation; integrated circuit design; mixed analogue-digital integrated circuits; mobile radio; phase locked loops; search problems; statistical analysis; wide area networks; PLL design; PLL power reduction; PLL system; PMR application; WAN; analog circuit design; curcuit optimization; fast layout optimization; geostatistic based metamodeling technique; geostatistical method; gravitational search algorithm; kriging; locking time; mixed signal circuit design; nanoscale CMOS phase locked loop; optimization algorithm; optimization design; private mobile radio; wide area network; Clocks; Irrigation;
Conference_Titel :
Quality Electronic Design (ISQED), 2013 14th International Symposium on
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4673-4951-2
DOI :
10.1109/ISQED.2013.6523664