DocumentCode :
602958
Title :
Performance validation through implicit removal of infeasible paths of the behavioral description
Author :
Jayaraman, D. ; Tragoudas, Spyros
Author_Institution :
ECE Dept., Southern Illinois Univ., Carbondale, IL, USA
fYear :
2013
fDate :
4-6 March 2013
Firstpage :
552
Lastpage :
557
Abstract :
In this paper we present a novel algorithm to identify infeasible paths in the behavioral code. The proposed approach initially partitions the behavioral code into segments. At each code segment it stores feasible paths implicitly. It also stores collections of input assignments which are derived using selected statements in the code segment. The method requires state-of-the-art data structures to store feasible paths and the required functions. Experimental results demonstrate the scalability of the proposed method.
Keywords :
data structures; integrated circuit design; behavioral code; behavioral description; code segment; data structure; integrated circuit design; performance validation; Benchmark testing; Binary decision diagrams; Bismuth; Hardware design languages; Partitioning algorithms; Scalability; BDD; code optimization; timing analysis; timing optimization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design (ISQED), 2013 14th International Symposium on
Conference_Location :
Santa Clara, CA
ISSN :
1948-3287
Print_ISBN :
978-1-4673-4951-2
Type :
conf
DOI :
10.1109/ISQED.2013.6523665
Filename :
6523665
Link To Document :
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