Title :
An efficient method for ECSM characterization of CMOS inverter in nanometer range technologies
Author :
Kaur, Baljit ; Miryala, Sandeep ; Manhas, Sanjeev Kumar ; Anand, B.
Author_Institution :
Indian Inst. of Technol. Roorkee, Roorkee, India
Abstract :
Accurate estimation of delay is a major challenge in current nanometer regime using Non Linear Delay Model (NLDM) due to issues such as parametric variation, nonlinear capacitance value etc. It demands a large number of simulations to be performed for getting the accurate delay values. To partly solve this issue, people have started using Effective Current Source Model (ECSM), which stores certain predefined Threshold Crossing Point (TCP) of the output voltage waveform with respect to different input transition time (TR) values and load capacitance (Cl). In this work, we propose an analytical timing model relating 10% - 90% TCPs with Cl and TR values. We also derive the relationship between the cell size and the model coefficients. We also derive the region of validity of the model in (TR, Cl) space and determine its relationship with cell size. The proposed model is in good agreement with HSPICE simulations with a maximum relative error of 2.5%. We verified the proposed model with technology scaling. We use this model and the relationships to reduce the number of simulations in ECSM library characterization.
Keywords :
CMOS integrated circuits; SPICE; invertors; nanotechnology; CMOS inverter; ECSM characterization; HSPICE simulations; NLDM; TCP; effective current source model; nanometer range technologies; nonlinear delay model; threshold crossing point; Analytical models; CMOS integrated circuits; Capacitance; Load modeling; Timing; CMOS inverter; ECSM; TCP; load capacitance; transition time;
Conference_Titel :
Quality Electronic Design (ISQED), 2013 14th International Symposium on
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4673-4951-2
DOI :
10.1109/ISQED.2013.6523681