Comparative Analysis of Schmitt Trigger with AVL (AVLG and AVLS) Technique Using Nanoscale CMOS Technology

The CMOS device is used to achieve better performance in terms of speed, power dissipation, size, reliability and hysteresis. Schmitt trigger minimized power consumption and improving compatibility with low voltage power supplies and analog component the most effective solution is to reduce the power consumption. This paper presented comparative study of AVLG, AVLS and AVL technique in 4T Schmitt trigger is used in such a way that by adjusting its threshold voltage, the signal can be made to increase early, thereby reducing the signal delay also due to less switching time, power dissipation is less, circuit is simulated in cadence in 45nm technology, simulation results show that 4T Schmitt trigger delay reduction 102.8ns at 1V and 3.97fw leakage power reduction at 0.7V input supply with AVL technique.