Dramatically Low-Transistor-Count High-Speed Ternary Adders

Ternary logic has inherently the potential of high computational speed in comparison with conventional binary logic. A new low-transistor-count, high-speed ternary half adder is presented in this paper. Carbon nanotube field effect transistors are utilized to realize the new design methodology. Unique characteristics of this technology provide multi-V_t circuitry with the flexibility which is highly essential for MVL designs. The given structure also benefits from high driving power and capability of operating in low voltages. It has only 26 transistors. A new high-performance ternary full adder is also presented. Finally, the proposed adder cells are put together in order to construct a 4-bit ternary ripple adder.