Title :
An algorithm for variable cache ways
Author_Institution :
Vellore Inst. of Technol., India
Abstract :
This paper proposed an algorithm for varying cache ways in set associative cache. The ways of the mapped cache set are extended to half of the ways of adjacent sets in this model. A set is thus viewed as growing in both ways. If a way is free in this extended model, the line is placed in the way. An owner vector indicates the set owner ship of the way. If all the ways are full, the least recently used way of the mapped set is replaced. The proposed model adopts tag cache model proposed in literature. The proposed model is simulated with SPEC2000 benchmarks. An improvement of 5% in average memory access time over traditional w-way set associative model and 3% over 2w-way set associative cache model for chosen parameters is observed. The energy consumed in the proposed model is comparable to the traditional set associative cache of same size.
Keywords :
cache storage; content-addressable storage; set theory; SPEC2000 benchmarks; adjacent sets; average memory access time improvement; energy consumption; mapped cache set; set associative cache; set ownership; tag cache model; variable cache ways; Analytical models; Arrays; Benchmark testing; Computational modeling; Energy consumption; Mathematical model; Vectors; Energy consumption; Memory access time; Variable cache ways;
Conference_Titel :
Advances in Technology and Engineering (ICATE), 2013 International Conference on
Conference_Location :
Mumbai
Print_ISBN :
978-1-4673-5618-3
DOI :
10.1109/ICAdTE.2013.6524729