DocumentCode :
604720
Title :
Synthesis of Toffoli Networks: Status and Challenges
Author :
Dueck, Gerhard W.
Author_Institution :
Fac. of Comput. Sci., Univ. of New Brunswick, Fredericton, NB, Canada
fYear :
2012
fDate :
19-22 Dec. 2012
Firstpage :
11
Lastpage :
16
Abstract :
This paper gives a brief overview of the current trends in reversible logic synthesis. The basic building block for reversible circuits considered here is the multiple-control Toffoli gate. Some approaches to synthesis are reviewed and challenges are explained. Since many practical functions are not reversible, they must be embedded into reversible ones, if they are to be implemented using reversible logic. The complexity of such embeddings is expounded. A two phase synthesis is described were particular attention is devoted to the optimization phase via template matching.
Keywords :
logic circuits; logic design; logic gates; network synthesis; optimisation; Toffoli synthesis network; multiple-control Toffoli gate; optimization; reversible logic circuit synthesis; template matching; two phase synthesis; Cost Metrics; Logic Synthesis; Reversible Logic; Template Matching; Toffoli Gates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic System Design (ISED), 2012 International Symposium on
Conference_Location :
Kolkata
Print_ISBN :
978-1-4673-4704-4
Type :
conf
DOI :
10.1109/ISED.2012.26
Filename :
6526544
Link To Document :
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