FIR filter design approach for reduced hardware with order optimization and coefficient quantization

Finite impulse response (FIR) filters are extensively used in mobiles, TVs and offer several good properties like guaranteed stability and exact linear phase. This paper presents a design approach that reduces the FIR filter order leading to optimized hardware implementation. The proposed approach begins by designing the FIR filter with the given specifications using the equiripple method. The order thus obtained is further reduced iteratively, but keeping the frequency response within specification. The coefficients of reduced filter are then quantized successively with lesser number of bits by an iterative algorithm to a level where its frequency response still remains within the original requirements. The proposed filter, the over specified optimized filter [6] and normal filters are implemented in verilog. The synthesis result shows that the proposed FIR filter uses 28% and 57% less hardware in comparison to the optimized implementation and normal implementation.