A high-throughput, contention-free low-power, Radix-2 1k,2k, 4k and 8k-point fast fourier transform engine using 28nm standard-cell process

This paper presents a high-throughput, contention-free, low-power, Radix-2 decimation in frequency fast Fourier transform core implemented in 28nm industry representative standard-cell process. It utilizes an algorithm to eliminate memory access contention and maximize throughput by eliminating bubbles in the butterfly´s pipeline. The implementation of the FFT core is presented, including timing and place-and-route result in 28nm standard CMOS process. The FFT core can perform 1024, 2048, 4096 and 8192 points FFT. The FFT core uses two-port SRAM elements and achieves a throughput of 2-butterfly operations every clock cycle. The FFT core performs 8K-points FFT in around 40uS.