Study of 25nm Symmetric Extended Source/Drain Schottky Tunneling Transistors

The performance of 25nm Symmetric Extended Source/Drain Schottky Tunneling Transistor (ESD-ST-SOIFET) with different gate structures are investigated through a TCAD modeling study. It is shown that, the doped extension regions adjacent to the source/drain schottky barrier improves the drive current by shrinking the schottky barrier and also the simulation results shows that the increasing doping levels at the source/drain(S/D) extensions increases the leakage current. The device shows better short channel effects compared to other schottky barrier devices. The analysis also shows that, the best characteristics of the proposed device can be obtained only if using proper silicides at the S/D regions. For best performance platinum silicide can be used for p-type and Erbium silicide can be used for n-type devices.