Space radiation and reliability qualifications on 65nm CMOS 600MHz microprocessors

Author

Clerc, Sylvain ; Abouzeid, Fady ; Gasiot, Gilles ; Daveau, J.-M. ; Bottoni, C. ; Glorieux, M. ; Autran, Jean-Luc ; Cacho, F. ; Huard, Vincent ; Dugoujon, Laurent ; Weigand, R. ; Malou, Florence ; Hili, L. ; Roche, Philippe

Author_Institution

STMicroelectron., Crolles, France

fYear

2013

fDate

14-18 April 2013

Abstract

Recent space programs have reached the limits of the current space digital ASIC offers, mainly relying on CMOS 180nm. The new ST CMOS 65nm space program described in this paper shows how those limits are overcome. Small modifications to the commercial bulk process, paired with cost effective design reinforcements allow higher density and better energy efficiency while ensuring a strong space-grade resilience. The implementation of a 32-bit SPARC LEON3 microprocessor demonstrates the capabilities of this new technology.

Keywords

CMOS digital integrated circuits; application specific integrated circuits; integrated circuit reliability; microprocessor chips; SPARC LEON3 microprocessor; ST CMOS space program; commercial bulk process; cost effective design reinforcements; digital ASIC; energy efficiency; frequency 600 MHz; reliability qualifications; size 180 nm; size 65 nm; space radiation; space-grade resilience; word length 32 bit; CMOS integrated circuits; Clocks; Computer architecture; Microprocessors; Program processors; Registers; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium (IRPS), 2013 IEEE International

Conference_Location

Anaheim, CA

ISSN

1541-7026

Print_ISBN

978-1-4799-0112-8

Electronic_ISBN

1541-7026

Type

conf

DOI

10.1109/IRPS.2013.6532051

Filename

6532051