Author :
Shin, D.J. ; Cho, K.S. ; Ji, Hong ; Lee, B.S. ; Kim, S.G. ; Bok, J.K. ; Choi, S.H. ; Shin, Y.H. ; Kim, Ji H. ; Lee, S.Y. ; Cho, K.Y. ; Kuh, B.J. ; Shin, J.H. ; Lim, J.S. ; Kim, Jae Min ; Choi, H.M. ; Ha, K.H. ; Park, Y.D. ; Chung, C.H.
Author_Institution :
Semicond. R&D Center, Samsung Electron., Hwasung, South Korea
Abstract :
We present an electro-photonic circuit integrated into a 65-nm DRAM periphery process. Its photonic circuit features 2-dB/mm waveguide, 7-dB grating coupler, 10-Gb/s modulator, and 5-Gb/s Ge photodiode.
Keywords :
DRAM chips; diffraction gratings; electro-optical modulation; elemental semiconductors; integrated optics; integrated optoelectronics; optical couplers; optical waveguides; photodiodes; silicon; DRAM process; Si; bit rate 10 Gbit/s; electro-photonic circuit; grating coupler; modulator; photodiode; silicon photonics; size 65 nm; waveguide; Integrated optics; Modulation; Optical interconnections; Optical waveguides; Performance evaluation; Photonics; Random access memory;
