Title :
Low-Pressure Joining of Large-Area Devices on Copper Using Nanosilver Paste
Author :
Zheng, Haomian ; Berry, Dave ; Calata, Jesus N. ; Ngo, Khai D. T. ; Luo, Sheng ; Lu, Guo-Quan
Author_Institution :
Department of Materials Science and Engineering, Center for Power Electronics Systems, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA
Abstract :
Low-temperature joining technology using nanosilver paste has been widely demonstrated for attaching power chips on silver or gold metallized substrates. In this paper, we investigate the processing conditions of nanosilver paste for bonding large-area chips on a plain copper surface. A double-print, low-pressure-assisted sintering process is developed for attaching the chips on copper. An evaluation criterion used in the process development is the bond strength of mechanical chips that are made of alumina and sintered on direct-bond-copper (DBC) substrates. The bond strength, measured by the die-shear test, is found to be in excess of 40 and 77 MPa at sintering pressures of 3 and 12 MPa, respectively, during sintering. Characterization of the bondline microstructure reveals a void-free sintered joint, the density of which increases, with increasing sintering pressure. Sintering in air causes partial oxidation of the copper surface, but the oxide can be easily removed by dipping in 1% hydrochloric acid solution. To evaluate the impact of the bonding and acid-cleaning process on device characteristics, a large-area insulated-gate-bipolar-transistor (IGBT) chip is bonded to DBC substrate and then wire-bonded for electrical testing. Test results shows that the die-attach process does not alter the IGBT performance.
Keywords :
Copper surface; die-attach; insulated-gate-bipolar-transistor (IGBT) module; low-temperature joining; nanosilver paste; power electronics packaging;
Journal_Title :
Components, Packaging and Manufacturing Technology, IEEE Transactions on
DOI :
10.1109/TCPMT.2013.2258971