Area-efficient power-rail ESD clamp circuit with SCR device embedded into ESD-transient detection circuit in a 65nm CMOS process

An area-efficient power-rail electrostatic discharge (ESD) clamp circuit with silicon-controlled rectifier (SCR) as main ESD clamp device has been proposed and verified in a 65nm CMOS process. By modifying the layout structure, the ESD-transient detection circuit can be totally embedded in the SCR device. From the measured results, the proposed power-rail ESD clamp circuit with SCR width of 45μm can achieve 7kV human-body-model (HBM) and 350V machinemodel (MM) ESD levels under the ESD stress event, while consuming the standby leakage current in the order of nano-ampere at room temperature under the normal circuit operating condition with 1V bias.