Title :
Cross-layer dynamic prefetching allocation strategies for high-performance multicores
Author :
Yin-Chi Peng ; Chien-Chih Chen ; Chia-Jung Chang ; Tien-Fu Chen ; Pen-Chung Yew
Author_Institution :
Dept. of Comput. Sci., Nat. Chiao-Tung Univ., Hsinchu, Taiwan
Abstract :
For the last decade, there have been varying techniques for hardware prefetchers to improve the system performance. However, due to limited space and bandwidth in a multicore system, the prefetching data fetched by prefetcher may pollute L1 cache even though the data is useful, thus resulting into significant performance degradation. Most contemporary multicore systems simply disable prefetching to avoid unexpected contention. This paper proposes a cross-layer and dynamic Prefetch Allocation Management (PAM) to provide better caching strategies in a parallel environment. Our approach has two main mechanisms, targeting at the different prefetch degree and location choices to minimize the cache pollution and contention. Across a variety of SPLASH2 and PARSEC benchmark, our PAM approach can contribute up to 12% of performance improvement on a 4-core multicore system compared to the static prefetcher configuration and also saves 9.1% of the memory bandwidth consumption of memory system.
Keywords :
cache storage; microprocessor chips; 4-core multicore system; L1 cache pollution; PARSEC benchmark; SPLASH2 benchmark; cache contention; contemporary multicore systems; cross-layer dynamic prefetching allocation strategies; dynamic PAM; dynamic prefetch allocation management; hardware prefetchers; high-performance multicores; memory bandwidth consumption; parallel environment; Bandwidth; Benchmark testing; Hardware; Memory management; Pollution; Prefetching; Resource management;
Conference_Titel :
VLSI Design, Automation, and Test (VLSI-DAT), 2013 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4673-4435-7
DOI :
10.1109/VLDI-DAT.2013.6533864