DocumentCode :
609705
Title :
Energy-efficient architecture for word-based Montgomery modular multiplication algorithm
Author :
Jheng-Hao Ye ; Tsung-Wei Hung ; Ming-Der Shieh
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
fYear :
2013
fDate :
22-24 April 2013
Firstpage :
1
Lastpage :
4
Abstract :
Montgomery modular multiplication is widely used in public key cryptosystems. This paper presents an energy-efficient architecture for word-based Montgomery modular multiplication algorithm. Using the proposed architecture mapping scheme in dependency graph, the switching activity of kernel can be greatly reduced. In addition, the proposed design also retains one-cycle latency between neighboring processing elements. Experimental results based on TSMC 90-nm CMOS technology show that compared to the related work, the proposed design achieves about 17% reduction in energy consumption for completing one 1024-bit Montgomery modular multiplication.
Keywords :
CMOS integrated circuits; public key cryptography; TSMC CMOS technology; architecture mapping scheme; energy-efficient architecture; kernel switching activity; public key cryptosystems; size 90 nm; word length 1024 bit; word-based montgomery modular multiplication algorithm; Algorithm design and analysis; Computer architecture; Delays; Elliptic curve cryptography; Hardware; Kernel; Power demand;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation, and Test (VLSI-DAT), 2013 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4673-4435-7
Type :
conf
DOI :
10.1109/VLDI-DAT.2013.6533882
Filename :
6533882
Link To Document :
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