Numerical simulation of silicon wafer warpage due to thin film residual stresses

Wafer warpage is one of the most important challenges in the fabrication of modern electronic devices. Other challenges include handling, tool faults, and misalignments and even wafer breakage. The wafer warpage translates into die warpage that has a remarkable impact on die pick, stack and attach. This paper describes the work performed to simulate the silicon wafer warpage as a function of the wafer thickness and the film stresses using the commercial finite element code ABAQUS. The model accounts for the silicon anisotropy to better simulate the deformation. The computed values of the warpage were compared with experimental data and showed good correlation. The numerical model developed can be used to better understand the relation between the film stress and the wafer warpage. Furthermore it can be used to predict the warpage based on the wafer thickness and the film stress, which can help mitigate the warpage by depositing films to reduce the overall wafer warpage.