DocumentCode :
610582
Title :
The understanding of the bulk trigate MOSFET´s reliability through the manipulation of RTN traps
Author :
Hsieh, E.R. ; Wu, P.C. ; Chung, Steve S. ; Tsai, C.H. ; Huang, R.M. ; Tsai, C.T.
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear :
2013
fDate :
22-24 April 2013
Firstpage :
1
Lastpage :
2
Abstract :
The manipulation of RTN-trap profiling bas been experimentally demonstrated on both planar and trigate MOSFETs. It was achieved by a simple experimental method to take the 2D profiling of the RTN-trap in both oxide depth (vertical) and channel (lateral) directions in the gate oxide. Then, by arranging various 2D fields for the device stress condition, the positions of RTN traps can be precisely controlled. This is the first being reported that the positions of RTN-traps can be manipulated, showing significant advances for the understanding of the trap generation and the impact on the device reliability. Results have demonstrated why trigate exhibits much worse reliability than the planar ones.
Keywords :
MOSFET; random noise; semiconductor device noise; semiconductor device reliability; 2D fields; 2D profiling; RTN-trap profiling manipulation; bulk trigate MOSFET reliability; device reliability; device stress condition; gate oxide; oxide depth; planar MOSFET; random trap noise; trap generation; Degradation; Electric fields; Logic gates; MOS devices; Reliability; Stress; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems, and Applications (VLSI-TSA), 2013 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4673-3081-7
Electronic_ISBN :
978-1-4673-6422-5
Type :
conf
DOI :
10.1109/VLSI-TSA.2013.6545596
Filename :
6545596
Link To Document :
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