DocumentCode
610870
Title
Truncated Logarithmic Approximation
Author
Sullivan, M.B. ; Swartzlander, Earl E.
Author_Institution
Sch. of Electr. & Comput. Eng., Univ. of Texas at Austin, Austin, TX, USA
fYear
2013
fDate
7-10 April 2013
Firstpage
191
Lastpage
198
Abstract
The speed and levels of integration of modern devices have risen to the point that arithmetic can be performed very fast and with high precision. Precise arithmetic comes at a hidden cost-by computing results past the precision they require, systems inefficiently utilize their resources. Numerous designs over the past fifty years have demonstrated scalable efficiency by utilizing approximate logarithms. Many such designs are based off of a linear approximation algorithm developed by Mitchell. This paper evaluates a truncated form of binary logarithm as a replacement for Mitchell´s algorithm. The truncated approximate logarithm simultaneously improves the efficiency and precision of Mitchell´s approximation while remaining simple to implement.
Keywords
approximation theory; Mitchell approximation algorithm; binary logarithm; linear approximation algorithm; logarithmic approximation; resource utilization; truncated approximate logarithm; Algorithm design and analysis; Analytical models; Approximation algorithms; Delays; Linear approximation; Logic gates; Truncated approximate binary logarithms; anti-logarithm generation; computer arithmetic; logarithm generation; mixed precision;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic (ARITH), 2013 21st IEEE Symposium on
Conference_Location
Austin, TX
ISSN
1063-6889
Print_ISBN
978-1-4673-5644-2
Type
conf
DOI
10.1109/ARITH.2013.34
Filename
6545907
Link To Document