DocumentCode :
610961
Title :
PRML: A Modeling Language for Rapid Design Exploration of Partially Reconfigurable FPGAs
Author :
Kumar, Ravindra ; Gordon-Ross, Ann
Author_Institution :
NSF Center for High-Performance Reconfigurable Comput., Univ. of Florida, Gainesville, FL, USA
fYear :
2013
fDate :
28-30 April 2013
Firstpage :
117
Lastpage :
120
Abstract :
Leveraging partial reconfiguration (PR) can improve system flexibility, cost, and performance/power/area tradeoffs over non-PR functionally-equivalent systems, however, realizing these benefits is challenging, time-consuming, and PR must be considered early during application design to reduce design exploration time and improve system quality. To facilitate realizing these benefits, we present an application design framework and an abstract modeling language for PR (PRML). By applying extensive PRML modeling guidelines to a complex arithmetic core, we show PRML´s potential for efficient PR capability analysis, enabling designers to determine Pareto optimal systems during application formulation based on designer-specified area and performance metrics.
Keywords :
field programmable gate arrays; integrated circuit design; Pareto optimal systems; abstract modeling language; application design framework; area tradeoffs; complex arithmetic core; design exploration time reduction; designer-specified area; extensive PRML modeling guidelines; flexibility improvement; partially reconfigurable FPGA; performance tradeoffs; power tradeoffs; quality improvement; rapid design exploration; Analytical models; Cloning; Computational modeling; Delays; Field programmable gate arrays; Pareto optimization; Performance evaluation; FPGA; design space exploration; partial reconfiguration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Custom Computing Machines (FCCM), 2013 IEEE 21st Annual International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4673-6005-0
Type :
conf
DOI :
10.1109/FCCM.2013.24
Filename :
6546005
Link To Document :
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