• DocumentCode
    610988
  • Title

    An Evaluation of High-Performance Embedded Processing on MPPAs

  • Author

    Zain-ul-Abdin ; Svensson, Bertil

  • Author_Institution
    Halmstad Univ., Halmstad, Sweden
  • fYear
    2013
  • fDate
    28-30 April 2013
  • Firstpage
    235
  • Lastpage
    235
  • Abstract
    Embedded signal processing is facing the challenges of increased performance as well as to achieve energy efficiency. Massively parallel processor arrays (MPPAs) consisting of hundreds of processing cores offer the possibility of meeting the growing performance demand in an energy efficient way by exploiting parallelism instead of scaling the clock frequency of a single processor. In this paper we evaluate two selected commercial architectures belonging to the category of MPPA. The adopted approach for the evaluation is to implement a real, industrial application in the form of compute-intensive parts of Synthetic Aperture Radar (SAR) systems.
  • Keywords
    array signal processing; embedded systems; parallel architectures; radar signal processing; synthetic aperture radar; MPPA; SAR system; compute-intensive parts; energy efficiency; high-performance embedded signal processing; industrial application; massively parallel processor arrays; processing cores; single processor clock frequency scaling; synthetic aperture radar systems; Clocks; Computer architecture; Parallel processing; Programming; Synthetic aperture radar; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Custom Computing Machines (FCCM), 2013 IEEE 21st Annual International Symposium on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    978-1-4673-6005-0
  • Type

    conf

  • DOI
    10.1109/FCCM.2013.44
  • Filename
    6546032