Title :
Package-on-Package Assembly Yield Assessment in the ODM/EMS Environment Using Monte Carlo Simulation
Author_Institution :
Dept. of Ind. Eng. & Manage., Nat. Taipei Univ. of Technol., Taipei, Taiwan
Abstract :
Package-on-package (PoP) is one of the major manufacturing strategies for achieving an electronic component miniaturization. Achieving a desired process yield is critical to maintaining competitiveness. This paper develops a scientific approach to assess the PoP assembly yield in both the x- y in-plane and the z-direction using a Monte Carlo simulation. Influences of variations of materials such as components and printed circuit boards (PCBs) are investigated. Equipment accuracy and different process strategies are also under consideration. The scenarios under which defects occur are defined through the geometric phenomena, process incidence, and theoretical inferences. Defects such as shorts and soldering open may occur after reflow soldering if there is an excessive amount of offset between the centers of the solder ball and the bonding pad during the component placement stage. The amount of component/PCB warpage during the reflow heating and coplanarity of the solder balls beneath the substrate will also impact the package stacking yield. The simulation-based design for experiment is employed to investigate the effects of soldering materials, stencil thickness, reflow temperature profile, and component ball height variation on the assembly yield. The optimal materials and process combinations are then identified.
Keywords :
Monte Carlo methods; chip scale packaging; integrated circuit yield; printed circuits; reflow soldering; surface mount technology; Monte Carlo simulation; PCB; PoP assembly yield; bonding pad; competitiveness; component ball height variation; component placement stage; defects; electronic component miniaturization; geometric phenomena; package stacking yield; package-on-package; printed circuit boards; process incidence; process yield; reflow heating; reflow soldering; reflow temperature profile; solder ball; soldering materials; stencil thickness; theoretical inferences; Bonding; Packaging; Soldering; Stacking; Substrates; Assembly yield; Monte Carlo simulation; PoP component; electronics assembly; surface mount technology;
Journal_Title :
Components, Packaging and Manufacturing Technology, IEEE Transactions on
DOI :
10.1109/TCPMT.2013.2273497