DocumentCode
612257
Title
RXv2 processor core for low-power microcontrollers
Author
Otani, Shuhei ; Ishikawa, Norito ; Kondo, Hiroki
Author_Institution
Renesas Electron. Corp., Itami, Japan
fYear
2013
fDate
17-19 April 2013
Firstpage
1
Lastpage
3
Abstract
We have developed a new processor architecture for microcontrollers which integrate high-capacity FLASH memory and many peripheral functional modules. This paper describes processor core architecture for low-power microcontrollers and our approach for reducing energy consumption with instruction fetch mechanisms. A large fraction of the total power budget of the microcontroller is the energy consumption in the path from the FLASH memory to the processor. An enhanced instruction set and pipeline structure provide an effective balance between high code density, power consumption performance and high processing performance with an novel prefetching unit to reduce the number of memory accesses.
Keywords
flash memories; instruction sets; low-power electronics; microcontrollers; RXv2 processor core architecture; code density; energy consumption; high-capacity FLASH memory; instruction fetch set mechanism; low-power microcontroller; peripheral functional module; pipeline structure; power consumption; prefetching unit; Digital signal processing; Flash memories; Microcontrollers; Pipelines; Power demand; Process control; Registers; dual-issue core; low-power; microcontrollcr; mstruction fetch umt;
fLanguage
English
Publisher
ieee
Conference_Titel
Cool Chips XVI (COOL Chips), 2013 IEEE
Conference_Location
Yokohama
Print_ISBN
978-1-4673-5780-7
Electronic_ISBN
978-1-4673-5781-4
Type
conf
DOI
10.1109/CoolChips.2013.6547914
Filename
6547914
Link To Document