Title :
Innovative practices session 2C: Memory test
Author :
Dixit, Charutosh ; Tekumalla, Ramesh ; Chakravarty, Sreejit ; Dixit, Charutosh ; D´Abreu, Manuel ; Bao, Zhuoyu ; Riccobene, Concetta
fDate :
April 29 2013-May 2 2013
Abstract :
Use of Nand Flash memory in storage devices is increasing at an exponential rate. As the technology feature size shrink, the reliability and endurance for the Nand device reduces. Currently Nand devices can have more than 258Gb cells. Testing such devices is not a trivial proposition. In this presentation we will discuss the failure modes for Nand flash, the test methods used and the challenges that we face.
Keywords :
Abstracts; Flash memories; Large scale integration; Random access memory; Redundancy; System-on-chip; Testing;
Conference_Titel :
VLSI Test Symposium (VTS), 2013 IEEE 31st
Conference_Location :
Berkeley, CA
Print_ISBN :
978-1-4673-5542-1
DOI :
10.1109/VTS.2013.6548892
