DocumentCode
613018
Title
A multi-parameter functional side-channel analysis method for hardware trust verification
Author
Bell, Caroline ; Lewandowski, Marcin ; Katkoori, Srinivas
Author_Institution
Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA
fYear
2013
fDate
April 29 2013-May 2 2013
Firstpage
1
Lastpage
4
Abstract
A hardware Trojan is a modification to a hardware design which inserts undesired or malicious functionality. They pose a substantial security risk, and as such, rapid, reliable detection of these Trojans has become a critical necessity. In this paper, we propose a method for detecting compromised designs quickly and effectively. The method involves a multi-parameter analysis of the design and statistical analysis to determine which designs have been compromised. We also briefly discuss a supplemental method of confirming our results using a targeted method of FPGA design analysis. This method was proposed for consideration in the Cyber Security Awareness Week (CSAW) 2012 Embedded Systems Challenge (ESC) hosted by the Polytechnic Institute of New York University. This served to independently verify our results. The method was awarded first place in the competition.
Keywords
field programmable gate arrays; integrated circuit design; invasive software; statistical analysis; FPGA design analysis; cyber security awareness week; embedded systems; hardware design; hardware trojan; hardware trust verification; malicious functionality; multiparameter functional side-channel analysis; statistical analysis; substantial security risk; undesired functionality; Field programmable gate arrays; Hardware; Reliability; Testing; Timing; Trojan horses; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2013 IEEE 31st
Conference_Location
Berkeley, CA
ISSN
1093-0167
Print_ISBN
978-1-4673-5542-1
Type
conf
DOI
10.1109/VTS.2013.6548923
Filename
6548923
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