DocumentCode
613031
Title
Identification of critical variables using an FPGA-based fault injection framework
Author
Riefert, A. ; Muller, Johannes ; Sauer, Matthias ; Burgard, Wolfram ; Becker, B.
Author_Institution
Albert-Ludwigs-Univ. Freiburg, Freiburg, Germany
fYear
2013
fDate
April 29 2013-May 2 2013
Firstpage
1
Lastpage
6
Abstract
The shrinking nanometer technologies of modern microprocessors and the aggressive supply voltage down-scaling drastically increase the risk of soft errors. In order to cope with this risk efficiently, selective hardware and software protection schemes are applied. In this paper, we propose an FPGA-based fault injection framework which is able to identify the most critical registers of an entire microprocessor. Further-more, our framework identifies critical variables in the source code of an arbitrary application running in its native environment. We verify the feasibility and relevance of our approach by implementing a lightweight and efficient error correction mechanism protecting only the most critical parts of the system. Experimental results with state estimation applications demonstrate a significantly reduced number of critical calculation errors caused by faults injected into the processor.
Keywords
field programmable gate arrays; microprocessor chips; nanoelectronics; power aware computing; state estimation; FPGA; aggressive supply voltage down-scaling; critical variable identification; error correction mechanism; fault injection framework; microprocessor; selective hardware; shrinking nanometer technology; software protection; state estimation; Circuit faults; Fault diagnosis; Field programmable gate arrays; Microprocessors; Radiation detectors; Registers; Software;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2013 IEEE 31st
Conference_Location
Berkeley, CA
ISSN
1093-0167
Print_ISBN
978-1-4673-5542-1
Type
conf
DOI
10.1109/VTS.2013.6548936
Filename
6548936
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