• DocumentCode
    613354
  • Title

    Power balancing in five level inverters

  • Author

    Sharma, V.K. ; Kumar, Manoj ; Gupta, K.K. ; Kirar, M.

  • Author_Institution
    Dept. of Electr. Eng., Maulana Azad Nat. Inst. of Technol., Bhopal, India
  • fYear
    2013
  • fDate
    5-8 May 2013
  • Firstpage
    434
  • Lastpage
    439
  • Abstract
    This paper presents a unique control scheme for achieving power balancing in recently proposed multilevel inverter topologies. Moreover, this strategy can be extended to any type of topology and to any number of output levels of multilevel inverter (MLI).Comparisons have been made between the power delivered by sources in two different topologies with and without applying the proposed control schemes. Voltage stress across different switches of both the topologies have been presented during power balancing operation.
  • Keywords
    PWM invertors; switching convertors; MLI; five level inverters; multilevel inverter; power balancing; sinusoidal PWM invertors; voltage stress; Capacitors; Harmonic analysis; Inverters; Modulation; Switches; Topology; Five level inverter; Power balancing; Sinusoidal pulse width modulation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Environment and Electrical Engineering (EEEIC), 2013 12th International Conference on
  • Conference_Location
    Wroclaw
  • Print_ISBN
    978-1-4673-3060-2
  • Type

    conf

  • DOI
    10.1109/EEEIC.2013.6549555
  • Filename
    6549555