DocumentCode :
613536
Title :
Ultra-high bandwidth fully-differential three-stage operational amplifiers in 40nm digital CMOS
Author :
Hong Chen ; Milovanovic, V. ; Giotta, D. ; Zimmermann, Horst
Author_Institution :
Inst. of Electrodynamics, Microwave & Circuit Eng., Vienna Univ. of Technol., Vienna, Austria
fYear :
2013
fDate :
8-10 April 2013
Firstpage :
76
Lastpage :
81
Abstract :
Two three-stage fully differential operational amplifiers designed in 40nm digital CMOS technology are presented. The proposed operational amplifiers are designed to be applied in high speed system on chips (SoCs). The proposed operational amplifiers would find applications in continues time system (CTS) or discrete time system (DTS) according to their own frequency response type, which are discussed and verified by postlayout simulation. Under 1.1V supply voltage and 1kΩ+4pF load, simulation results show that 49dB DC gain, 3.2GHz GBW are achieved with 17mA DC current consumption for both operational amplifiers. The RMS input referred noise integrated from DC to 50MHz is 14.2μV for both operational amplifiers. The fully-symmetric layout pattern minimizes the input offset. Each of the operational amplifiers occupies about 0.011mm2 chip area.
Keywords :
CMOS analogue integrated circuits; CMOS digital integrated circuits; VHF amplifiers; VHF circuits; circuit simulation; continuous time systems; differential amplifiers; discrete time systems; frequency response; integrated circuit design; integrated circuit layout; integrated circuit noise; microwave amplifiers; microwave integrated circuits; operational amplifiers; system-on-chip; CTS; DTS; RMS input referred noise; SoC; bandwidth 3.2 GHz; capacitance 4 pF; continues time system; current 17 mA; current consumption; digital CMOS technology; discrete time system; frequency 50 MHz; frequency response; fully-symmetric layout pattern minimization; gain 49 dB; postlayout simulation; resistance 1 kohm; size 40 nm; system on chip; ultrahigh bandwidth fully-differential three-stage operational amplifier; voltage 1.1 V; voltage 14.2 muV; CMOS integrated circuits; Capacitors; Noise; Operational amplifiers; Poles and zeros; Resistors; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2013 IEEE 16th International Symposium on
Conference_Location :
Karlovy Vary
Print_ISBN :
978-1-4673-6135-4
Electronic_ISBN :
978-1-4673-6134-7
Type :
conf
DOI :
10.1109/DDECS.2013.6549792
Filename :
6549792
Link To Document :
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