Automatic synthesis of small AdaBoost classifier in FPGA

Author

Kadlcek, F. ; Fucik, Otto

Author_Institution

Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic

fYear

2013

fDate

8-10 April 2013

Firstpage

92

Lastpage

97

Abstract

Novel pre-processing units for AbaBoost classifiers are introduced which can improve performance and reduce power consumption in many image processing applications. An approach for automatic classifier synthesis to the FPGA is also described. The introduced classification architecture is intensively saving processing resources and very fast as well. Several optimization techniques that are used in the process of automatic synthesis are also shown.

Keywords

field programmable gate arrays; learning (artificial intelligence); pattern classification; AdaBoost classifier; FPGA; automatic classifier synthesis; classification architecture; image processing applications; optimization techniques; power consumption reduction; pre-processing units; processing resources; Classification algorithms; Field programmable gate arrays; Optimization; Power demand; Program processors; Table lookup; AdaBoost; Automatic synthesis; FPGA; FPGA optimisation; LBP;

fLanguage

English

Publisher

ieee

Conference_Titel

Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2013 IEEE 16th International Symposium on

Conference_Location

Karlovy Vary

Print_ISBN

978-1-4673-6135-4

Electronic_ISBN

978-1-4673-6134-7

Type

conf

DOI

10.1109/DDECS.2013.6549795

Filename

6549795