Approach for a unified functional verification flow

This paper proposes a unified flow for functional verification using assertion-based and coverage-based verification techniques. For each technique, both simulation and formal methodologies are combined together in order to accelerate the coverage closure and achieve the functional verification goal. The assertion-based and coverage-based verification techniques are well defined individually. However, our aim is to approach the combination of these techniques beside low power verification and clock domain crossing verification techniques in one complete verification flow. This approach will lead to a clear and unified verification methodology which can be the guideline for building an efficient functional verification environment.